Download Analog Circuit Design: High-Speed A-D Converters, Automotive by Arthur H.M. van Roermund, Herman Casier, Michiel Steyaert PDF

By Arthur H.M. van Roermund, Herman Casier, Michiel Steyaert

ISBN-10: 9048173027

ISBN-13: 9789048173020

Analog Circuit layout includes in overall 18 tutorials. They replicate the contributions of 6 specialists in all of the 3 fields coated by way of the 3 chapters pointed out within the subtitle, as awarded on the fifteenth workshop on Advances in Analog Circuit layout (AACD) held in Maastricht, April 2006.

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Additional info for Analog Circuit Design: High-Speed A-D Converters, Automotive Electronics and Ultra-Low Power Wireless

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To generate the the 250-ps delays between adjacent clocks, we use a 4-stage DLL at 500 MHz, which reduces the power requirement by 16x. To get the 32 clocks at 125 MHz, we divide each 500 MHz phase by 4. To get the required timing alignment, we introduce digitally-controlled delays in two places: 1) after the DLL and 2) after the divide-by-4 stages. The combination gives us a total delay-adjust range of around 100 ps and resolution of 250 fs. Fig. 4. Clock Generator. K. Poulton et al. 5. Calibration The overall block diagram of the 4-GSa/s ADC is shown in Fig.

Poulton et al. 13µm CMOS”, IEEE International Solid State Circuits Conference Digest of Technical Papers, pp. 576-577, Feb 2006. 13um CMOS”, IEEE International Solid State Circuits Conference Digest of Technical Papers, pp. 574-575, Feb 2006. [12] P. Schvan, D. Pollex, S-C. Wang, C. Falt, N. Ben-Hamida, “A 22GS/s 5b ADC in 130nm SiGe BiCMOS”, IEEE International Solid State Circuits Conference Digest of Technical Papers, Feb 2006. [13] Data courtesy of Boris Murmann. CONCEPTS AND IMPROVEMENTS IN PIPELINE AND SAR ADCS Dieter Draxelmayr, Peter Bogner Abstract In this paper we want to review the development of pipelined and SAR ADCs from basic concepts to novel techniques.

We will demonstrate that there are quite a lot of similarities and that there are a few major discrepancies. Based on this we draw comparisons and point out specific strengths and weaknesses of the individual architectures. 1. Introduction Pipeline A/D-converters have received considerable attention over the last couple of years. At every ISSCC we were able to find several papers on this topic demonstrating a great deal of research interest and - of course demonstrating step by step improvements of the underlying basic concepts.

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